Design and low-power implementation of an adaptive image rejection receiver.
Ediz ÇetinSinan TopcuIzzet KaleRichard C. S. MorlingPublished in: ISCAS (2008)
Keyphrases
- low power
- vlsi architecture
- cmos technology
- high speed
- single chip
- power consumption
- logic circuits
- low power consumption
- low cost
- ultra low power
- gate array
- circuit design
- power dissipation
- vlsi circuits
- digital signal processing
- efficient implementation
- design methodology
- vlsi implementation
- design considerations
- low complexity
- design process
- high power
- power reduction
- mixed signal
- parallel processing
- signal processor
- wireless transmission
- image processing algorithms
- jpeg images