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An On-Chip Integrated CMOS Ring Mixer-Balun-VCO Achieving IIP3 of 11.2 dBm and Phase Noise of -117.2 dBc/Hz.
Pravinah Nair Shasidharan
Jagadheswaran Rajendran
Selvakumar Mariappan
Yusman Mohd Yusof
Published in:
RoViSP (2021)
Keyphrases
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high speed
analog vlsi
low cost
circuit design
single chip
cmos image sensor
low power
cmos technology
image sensor
random access memory
power consumption
chip design
frame rate
nm technology
real time
focal plane
power dissipation
ultra low power
mixed signal
vlsi implementation
design methodology
neural network