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A 6nW 30.8kHz Relaxation Oscillator with Sampling Bias-Free RC Circuit and Dynamic Power Scaling in a 12nm FinFET.

Fan-Wei LiaoShan-Chih TsouChien-Sheng Chao
Published in: VLSI Technology and Circuits (2023)
Keyphrases
  • power consumption
  • clock gating
  • power reduction
  • random sampling
  • decision trees
  • dynamic environments
  • real time
  • x ray
  • sample size
  • parameter space
  • sampling rate
  • power dissipation
  • cmos technology