A 3D Stackable 1T1C DRAM: Architecture, Process Integration and Circuit Simulation.
Meng HuangShufang SiZheng HeYing ZhouSijia LiHong WangJinying LiuDongsheng XieMengmeng YangKang YouChris ChoiYi TangXiaojie LiShibing QianXiaodong YangLong HouWeiping BaiZhongming LiuYanzhe TangQiong WuYanqin WangTao DouJake KimGuilei WangJie BaispAdachi TakaoChao ZhaoAbraham YooPublished in: IMW (2023)