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A multi-level Hierarchical Quasi-Cyclic matrix for implementation of flexible partially-parallel LDPC decoders.

Vikram Arkalgud ChandrasettySyed Mahfuzul Aziz
Published in: ICME (2011)
Keyphrases
  • parallel implementation
  • cluster of workstations
  • modular design
  • parallel algorithm
  • parallel processing
  • dimensionality reduction
  • low rank