Login / Signup

A 12-bit 2.32GS/s pipelined/SAR hybrid ADC with a high-linearity input buffer.

Xuehao GuoZhiyang LiHao FangZelin JiaFuli TianChunyi SongZhiwei Xu
Published in: IEICE Electron. Express (2023)
Keyphrases
  • higher order
  • input data
  • data sets
  • learning environment
  • power consumption
  • synthetic aperture radar
  • virtual memory