SAT-Based Bounded Software Model Checking for Embedded Software: A Case Study.
Yunho KimMoonzoo KimPublished in: APSEC (1) (2014)
Keyphrases
- embedded software
- model checking
- bounded model checking
- software architecture
- temporal logic
- embedded systems
- formal verification
- development projects
- planning domains
- computation tree logic
- automated verification
- symbolic model checking
- model checker
- formal specification
- software systems
- formal methods
- epistemic logic
- verification method
- software development
- transition systems
- ai planning
- sequence diagrams
- real time
- source code
- case study
- petri net
- low cost
- software engineering