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A 4-GHz clock system for a high-performance system-on-a-chip design.
Joseph M. Ingino
Vincent R. von Kaenel
Published in:
IEEE J. Solid State Circuits (2001)
Keyphrases
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chip design
high speed
power consumption
power dissipation
physical design
design methodology
low power
clock frequency
cost effective
databases
neural network
pattern recognition
state space
management system
fuzzy neural network
field effect transistors