Speed-Optimized Implementation of Fast Chirplet Decomposition Algorithm on FPGA-SoC.
Austin FiteMikhail GromovTianyang FangJafar SaniiePublished in: eIT (2023)
Keyphrases
- decomposition algorithm
- high speed
- decomposition method
- hardware implementation
- hardware software co design
- low power
- real time
- working set
- dedicated hardware
- field programmable gate array
- hardware architecture
- fpga technology
- equality constraints
- software implementation
- signal processing
- efficient implementation
- fpga implementation
- embedded systems
- hardware architectures
- image classification