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Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler.
David Judd
Katherine A. Yelick
Christoforos E. Kozyrakis
David R. Martin
David A. Patterson
Published in:
Intelligent Memory Systems (2000)
Keyphrases
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level parallelism
memory bandwidth
parallel programming
instruction set
parallel processing
multi core processors
floating point
processing power
memory access
real time
software engineering
design patterns
parallel computing