Charge recycling differential logic (CRDL) for low power application.

Bai-Sun Kong Joo-Sun Choi Seog-Jun Lee Kwyro Lee

Published in: IEEE J. Solid State Circuits (1996)

Keyphrases

low power
low cost
high speed
power consumption
logic circuits
ultra low power
image sensor
high power
delay insensitive
image processing
computer simulation
image processing algorithms
digital signal processing
vlsi architecture
low power consumption
vlsi circuits