Login / Signup

HL5: A 32-bit RISC-V Processor Designed with High-Level Synthesis.

Paolo MantovaniRobert MargelliDavide GiriLuca P. Carloni
Published in: CICC (2020)
Keyphrases
  • stereo matching
  • high level synthesis
  • parallel architecture
  • instruction set
  • high speed
  • computer architecture
  • real world
  • data processing
  • application specific
  • floating point