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Development of low-power high speed (10Gb/s) drivers in CMOS 130 nm technology.
Marika Kuczynska
Szymon Bugiel
Miroslaw Firlej
Tomasz Fiutowski
Marek Idzik
Jakub Moron
Krzysztof Swientek
Published in:
MIXDES (2015)
Keyphrases
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low power
high speed
nm technology
power consumption
single chip
low cost
wireless transmission
power dissipation
real time
digital signal processing
logic circuits
vlsi circuits
high power
low power consumption
vlsi architecture
power reduction
mixed signal
image sensor
focal plane
cmos technology