A 280MS/s 12b SAR-Assisted Hybrid ADC with Time Domain Sub-Range Quantizer in 45nm CMOS.
Zhan SuHechen WangHaoyi ZhaoZhenqi ChenYanjie WangFa Foster DaiPublished in: CICC (2019)
Keyphrases
- power consumption
- high speed
- cmos technology
- wide range
- analog to digital converter
- vector quantization
- coding scheme
- synthetic aperture radar
- nm technology
- metal oxide semiconductor
- single chip
- step size
- low cost
- isar imaging
- low power
- sar images
- image compression
- integrated circuit
- power supply
- quadtree
- delay insensitive
- signal to noise ratio
- image reconstruction
- frequency domain