An FPGA-based processing pipeline for high-definition stereo video.

Pierre Greisen Simon Heinzle Markus H. Gross Andreas Burg

Published in: EURASIP J. Image Video Process. (2011)

Keyphrases

high definition
processing pipeline
stereo video
real time
multi view
hd video
video coding
disparity estimation
free viewpoint video
stereo matching
high resolution
action recognition
video sequences
vision system
signal processing
motion estimation
rate distortion
low complexity
ground truth
image processing