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An efficient protocol with synchronization accelerator for multi-processor embedded systems.
Jiyang Yu
Peng Liu
Weidong Wang
Chunming Huang
Jie Yang
Yingtao Jiang
Qingdong Yao
Published in:
Parallel Comput. (2013)
Keyphrases
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embedded systems
multi processor
field programmable gate array
protocol stack
low cost
program execution
single processor
shared memory
multi core processors
software systems
case study
distributed memory
flash memory
parallel implementation
quality of service
graph cuts
open source
database systems