Login / Signup
A computation of D(9) using FPGA Supercomputing.
Lennart Van Hirtum
Patrick De Causmaecker
Jens Goemaere
Tobias Kenter
Heinrich Riebler
Michael Lass
Christian Plessl
Published in:
CoRR (2023)
Keyphrases
</>
high speed
real time
hardware implementation
hardware architecture
databases
real time image processing
low cost
pipelined architecture
data sets
artificial intelligence
hardware design
hardware architectures