Login / Signup

A Methodology for Mapping SysML Activity Diagram to Time Petri Net for Requirement Validation of Embedded Real-Time Systems with Energy Constraints.

Ermeson Carneiro de AndradePaulo Romero Martins MacielGustavo Rau de Almeida CallouBruno Costa e Silva Nogueira
Published in: ICDS (2009)
Keyphrases