VLSI-Oriented Architecture for Two's Complement Serial-Parallel Multiplication without Speed Penalty.
Sangman MohPublished in: ICCSA Workshops (2007)
Keyphrases
- high speed
- processor array
- signal processing
- real time
- shared memory
- bit parallel
- vlsi circuits
- vlsi design
- power dissipation
- parallel computation
- processing units
- parallel implementation
- low power
- parallel processing
- parallel algorithm
- databases
- floating point
- general purpose
- image segmentation
- depth first search
- parallel execution
- case study
- arithmetic operations
- vlsi implementation
- social networks
- artificial intelligence
- machine learning