An 8.8 TFLOPS/W Floating-Point RRAM-Based Compute-in-Memory Macro Using Low Latency Triangle-Style Mantissa Multiplication.
Xianwu HuYu WangZizhao MaGan WenZeming WangZhichao LuYunlong LiuYanlei LiXingdong LiangXiaoyang ZengYufeng XiePublished in: IEEE Trans. Circuits Syst. II Express Briefs (2023)