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A programmable and scalable technique to design spintronic logic circuits based on magnetic tunnel junctions.
Shruti R. Patil
David J. Lilja
Published in:
ACM Great Lakes Symposium on VLSI (2011)
Keyphrases
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logic circuits
functional decomposition
low power
single chip
gate array
low cost
case study
user interface
design process
magnetic field
computer vision
high speed
simulation model