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A 16nm 785GMACs/J 784-Core Digital Signal Processor Array With a Multilayer Switch Box Interconnect, Assembled as a 2×2 Dielet with 10μm-Pitch Inter-Dielet I/O for Runtime Multi-Program Reconfiguration.

Uneeb RathoreSumeet Singh NagiSubramanian IyerDejan Markovic
Published in: ISSCC (2022)
Keyphrases
  • digital signal
  • processor array
  • high speed
  • input output
  • parallel implementation
  • video processing
  • parallel algorithm
  • file system
  • artificial intelligence
  • object detection
  • data access
  • array processor