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A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC.

Tianyu JiaPaolo MantovaniMaico Cassel Dos SantosDavide GiriJoseph ZuckermanErik Jens LoscalzoMartin CochetKarthik SwaminathanGabriele TombesiJeff Jun ZhangNandhini ChandramoorthyJohn-David WellmanKevin TienLuca P. CarloniKenneth L. ShepardDavid BrooksGu-Yeon WeiPradip Bose
Published in: ESSCIRC (2022)
Keyphrases
  • memory hierarchy
  • low cost
  • high speed
  • main memory
  • databases
  • low power
  • database operations
  • secondary storage
  • database
  • query processing
  • object oriented
  • computing power
  • cmos technology