routing for mesh topology based NoC router on field programmable gate array.
Priti ShahaneNarayan PisharotyPublished in: IET Circuits Devices Syst. (2019)
Keyphrases
- network on chip
- interconnection networks
- field programmable gate array
- routing algorithm
- fault tolerant
- hardware implementation
- parallel computing
- parallel algorithm
- programmable logic
- parallel computers
- embedded systems
- message passing
- digital signal processors
- ad hoc networks
- image processing algorithms
- fpga device
- routing protocol
- hardware architecture
- fpga technology
- shortest path
- wireless sensor networks
- digital signal processing
- computing systems
- hardware design
- hardware software co design
- host computer
- general purpose processors
- signal processing
- pipelined architecture
- parallel architectures
- xilinx virtex
- wireless networks
- energy consumption
- hardware description language
- general purpose
- massively parallel