Preliminary Implementation of Toeplitz Hashing on Processor, Co-Processor and SoC.
Guru Satya Dattatreya PandeetiJanhvi DixitAsif HussainDibya Prakash BeheraUmang DubeyAnindita BanerjeeSamrit Kumar MaityManish ModaniPublished in: COMSNETS (2024)
Keyphrases
- instruction set
- computer architecture
- cell broadband engine architecture
- high speed
- parallel processing
- single chip
- parallel architecture
- highly parallel
- computation intensive
- parallel architectures
- shared memory multiprocessors
- distributed memory
- memory management
- single processor
- parallel computers
- processor core
- database systems
- operating system
- least squares
- data structure
- similarity measure