A reconfigurable and compact hardware architecture of CLEFIA block cipher with multi-configuration.
Xin ChengHaowen ZhuYixuan XuYongqiang ZhangHao XiaoZhang ZhangPublished in: Microelectron. J. (2021)
Keyphrases
- hardware architecture
- hardware implementation
- field programmable gate array
- block cipher
- hardware architectures
- efficient implementation
- processing elements
- lightweight
- general purpose
- signal processing
- associative memory
- embedded systems
- low cost
- pattern recognition
- s box
- xilinx virtex
- information systems
- markov random field
- data processing
- parallel processing
- real time
- image processing