High-Level Synthesis Implementation of Transform-Exempted SATD Architectures for Low-Power Video Coding.
Tero PartanenAri LemmettiPanu SjövallJarno VannePublished in: ISCAS (2021)
Keyphrases
- video coding
- low power
- high level synthesis
- power consumption
- low cost
- high speed
- rate distortion
- motion estimation
- motion compensation
- motion compensated
- bit rate
- video quality
- video compression
- video codec
- motion vectors
- macroblock
- parallel architecture
- ultra low power
- low power consumption
- rate control
- image processing
- bit allocation
- image data
- video streaming
- inter frame
- scalable video coding
- rate allocation
- efficient implementation
- error resilience
- computer vision