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A low-voltage MOS translinear loop, biased using FVF and its applications in realizing square-rooter and squarer circuits.

Aakriti ChhabraBhawna AggarwalRaj Senani
Published in: Integr. (2024)
Keyphrases
  • floating gate
  • low voltage
  • power line
  • design considerations
  • random access memory
  • power management
  • cmos technology
  • genetic algorithm
  • particle swarm optimization
  • circuit design