Automatically Verifying Railway Interlockings using SAT-based Model Checking.
Phillip JamesMarkus RoggenbachPublished in: Electron. Commun. Eur. Assoc. Softw. Sci. Technol. (2010)
Keyphrases
- model checking
- bounded model checking
- temporal logic
- formal verification
- planning domains
- temporal properties
- finite state
- automated verification
- partial order reduction
- verification method
- finite state machines
- formal specification
- model checker
- computation tree logic
- pspace complete
- timed automata
- transition systems
- asynchronous circuits
- symbolic model checking
- process algebra
- linear temporal logic
- formal methods
- reachability analysis
- epistemic logic
- answer set programming
- reactive systems
- concurrent systems
- multi agent systems
- deterministic finite automaton
- constraint satisfaction
- domain specific