A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology.
Bo XiangYongping FanJames S. AyersJames ShenDan ZhangPublished in: CICC (2020)
Keyphrases
- cmos technology
- low power
- high speed
- mixed signal
- ultra low power
- clock frequency
- power consumption
- spl times
- low voltage
- low cost
- parallel processing
- single chip
- digital signal processing
- image sensor
- cmos image sensor
- signal processing
- dual band
- image sequences
- image processing
- video data
- low power consumption
- image restoration