A Compiler Directed Approach to Hiding Configuration Latency in Chameleon Processors.
Xinan TangManning AalsmaRaymond JouPublished in: FPL (2000)
Keyphrases
- parallel execution
- parallel algorithm
- load balance
- parallel programming
- programming language
- parallel processing
- low latency
- response time
- highly optimized
- instruction scheduling
- memory bandwidth
- general purpose
- parallel computing
- prefetching
- software systems
- data transfer
- shared memory
- high end
- parallel computers
- parallel processors
- optimal configuration
- object oriented
- heterogeneous computing
- resource utilization
- processing units
- power consumption
- computer systems
- signal processing