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Determination of throughput guarantees for processor-based SmartNICs.
Johannes Krude
Jan Rüth
Daniel Schemmel
Felix Rath
Iohannes-Heorh Folbort
Klaus Wehrle
Published in:
CoNEXT (2021)
Keyphrases
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response time
high speed
computer architecture
information systems
parallel processing
low latency
allocation scheme
instruction set
single processor
theoretical guarantees
initial state
channel capacity
single chip
resource utilization
database
low cost
sensor networks
neural network