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Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Architecture.
Zahid Khan
Tughrul Arslan
Published in:
ASP-DAC (2007)
Keyphrases
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vlsi architecture
real time
low density parity check
low complexity
low cost
low power
vlsi implementation
general purpose processors
hardware implementation
instruction set
distributed video coding
ldpc codes
source coding
information theoretic
bit rate
error correction
message passing
high speed