A 0.6V 54DB SNR Analog Frontend with 0.18% THD for Low Power Sensory Applications in 65NM CMOS.
Komail M. H. BadamiKushal Dakshina MurthyPieter HarpeMarian VerhelstPublished in: VLSI Circuits (2018)
Keyphrases
- low power
- mixed signal
- cmos technology
- vlsi architecture
- nm technology
- power consumption
- signal to noise ratio
- high speed
- vlsi circuits
- low cost
- cmos image sensor
- image sensor
- low voltage
- single chip
- high power
- silicon on insulator
- power reduction
- focal plane
- metal oxide semiconductor
- wide dynamic range
- analog vlsi
- power dissipation
- digital signal processing
- low power consumption
- logic circuits
- real time
- ultra low power
- parallel processing
- circuit design
- analog to digital converter
- gate array