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Design and FPGA Implementation of an High Efficient XGBoost Based Sleep Staging Algorithm Using Single Channel EEG.

Yiqiao LiaoMilin ZhangZhihua WangXiang Xie
Published in: ICCSIP (1) (2018)
Keyphrases
  • fpga implementation
  • computational complexity
  • computationally efficient
  • hardware implementation
  • single channel
  • image processing
  • image sequences
  • probabilistic model
  • prior information
  • real time
  • feature extraction