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A Reconfigurable and Pipelined Architecture for Standard-Compatible LDPC and Polar Decoding.
Shan Cao
Ting Lin
Shunqing Zhang
Shugong Xu
Chuan Zhang
Published in:
IEEE Trans. Veh. Technol. (2021)
Keyphrases
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hardware implementation
ldpc codes
decoding algorithm
pipelined architecture
field programmable gate array
low density parity check
real time
general purpose
data processing
frequency domain
turbo codes
neural network
computer vision
low cost