Fast and Processor Efficient Parallel Matrix Multiplication Algorithms on a Linear Array With a Reconfigurable Pipelined Bus System.
Keqin LiYi PanSi-Qing ZhengPublished in: IEEE Trans. Parallel Distributed Syst. (1998)
Keyphrases
- matrix multiplication
- linear array
- distributed memory
- parallel architectures
- processing elements
- single processor
- parallel processing
- computation intensive
- parallel architecture
- high speed
- parallel computers
- orders of magnitude
- efficient implementation
- message passing
- hardware implementation
- image processing algorithms
- massively parallel
- computational complexity
- shared memory
- highly efficient
- np hard