Streamlined NTRU Prime on FPGA.
Bo-Yuan PengAdrian MarotzkeMing-Han TsaiBo-Yin YangHo-Lin ChenPublished in: IACR Cryptol. ePrint Arch. (2021)
Keyphrases
- group signature scheme
- field programmable gate array
- high speed
- hardware implementation
- real time image processing
- verilog hdl
- low cost
- fpga implementation
- software implementation
- hardware architecture
- dedicated hardware
- machine learning
- real time
- fpga hardware
- low power consumption
- hardware design
- fpga technology
- real world
- systolic array
- high speed train
- parallel architecture
- single chip
- data acquisition
- software systems
- expert systems
- similarity measure
- computer vision