Cross-Chip: Low power processor-to-memory nanophotonic interconnect architecture.
Matthew KennedyAvinash Karanth KodiPublished in: IGSC (2015)
Keyphrases
- low power
- high speed
- power dissipation
- single chip
- nm technology
- vlsi architecture
- cmos technology
- mixed signal
- cmos image sensor
- power consumption
- low cost
- real time
- gigabit ethernet
- gate array
- signal processor
- low power consumption
- memory subsystem
- memory management
- clock frequency
- multithreading
- digital signal processing
- embedded dram
- level parallelism
- vlsi circuits
- analog to digital converter
- image sensor
- logic circuits
- memory access
- processing elements
- power reduction
- random access memory
- ibm zenterprise
- low voltage
- associative memory
- design considerations
- power management