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A Scalable Architecture for Accelerating Multi-Operation and Continuous Floating-Point Matrix Computing on FPGAs.
Longlong Zhang
Yuanxi Peng
Ahui Huang
Xiao Hu
Published in:
IEEE Access (2020)
Keyphrases
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floating point
square root
instruction set
floating point arithmetic
sparse matrices
fixed point
hardware software
hardware implementation
floating point unit
higher order
graphical models
singular value decomposition
smart camera
interval arithmetic
level parallelism
fpga technology