Low Power Logic Obfuscation Through System Level Clock Gating.
Daniel XingYuntao LiuAnkur SrivastavaPublished in: ISLPED (2023)
Keyphrases
- low power
- power consumption
- power reduction
- logic circuits
- low cost
- power dissipation
- high speed
- delay insensitive
- single chip
- vlsi architecture
- power saving
- low power consumption
- cmos technology
- vlsi circuits
- energy efficiency
- energy saving
- image sensor
- digital signal processing
- mixed signal
- ultra low power
- computer vision
- fine grained