A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU.
Masayuki ItoKenichi NittaKoji OhnoMasahito SaigusaMasaki NishidaShinichi YoshiokaTakahiro IritaTakao KoikeTatsuya KameiTeruyoshi KomuroToshihiro HattoriYasuhiro AraiYukio KodamaPublished in: IEEE J. Solid State Circuits (2009)