Scalable Cache Miss Handling for High Memory-Level Parallelism.

James Tuck Luis Ceze Josep Torrellas

Published in: MICRO (2006)

Keyphrases

memory bandwidth
level parallelism
commodity hardware
instruction set
cache misses
parallel processing
memory access
multi core processors
parallel programming
floating point
computational complexity
general purpose
main memory
prefetching
highly scalable
memory hierarchy