Parallel FPGA Routers With Lagrange Relaxation.
Rohit AgrawalKapil AhujaDhaarna MaheshwariMohd Ubaid ShaikhMohamed BouazizAkash KumarPublished in: IEEE Access (2023)
Keyphrases
- parallel hardware
- high speed
- parallel architecture
- load balancing
- end to end
- real time
- parallel processing
- systolic array
- low cost
- signal processing
- real time image processing
- multi core processors
- parallel programming
- neural network
- hardware design
- distributed memory
- field programmable gate array
- parallel implementation
- hardware implementation
- single chip
- processing elements
- shared memory
- verilog hdl