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PrePack: Predictive Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.
J.-G. Lee
C.-M. Kyung
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2006)
Keyphrases
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hardware software
hardware and software
packet size
embedded systems
hw sw
real time
neural network
multi core processors
image processing
high performance computing
coarse grained
hardware design