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A low-power small-area open loop digital DLL for 2.2Gb/s/pin 2Gb DDR3 SDRAM.
Jong-Chern Lee
Sin-Hyun Jin
Dae-Suk Kim
Young Jun Ku
Chul Kim
Byung-Kwon Park
Hong-Gyeom Kim
Seong-Jun Ahn
Jaejin Lee
Sung-Joo Hong
Published in:
A-SSCC (2011)
Keyphrases
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low power
high speed
open loop
closed loop
mixed signal
low cost
power consumption
control system
feedback control
single chip
vlsi circuits
digital signal processing
logic circuits
real time
inverted pendulum
low power consumption
image sensor
pid controller
cmos technology
vlsi architecture
multi channel