A unified systolic architecture for combined inter and intra predictions in H.264/AVC decoder.
Chih-Hung LiChih-Chieh ChenDrew Wei-Chi SuMing-Jiun WangWen-Hsiao PengTihao ChiangGwo Giun LeePublished in: IWCMC (2006)
Keyphrases
- low complexity
- video codec
- video decoder
- decoding process
- video transcoding
- video coding
- fpga implementation
- multiview video coding
- intra coding
- bitstream
- motion compensated prediction
- motion estimation
- video coding standard
- video streams
- bit rate
- error resilience
- mode decision
- video encoder
- macroblock
- image coding
- mode selection
- mpeg avc
- rate distortion
- computational complexity