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Simulation Analysis of Low Power Synchronous Token Ring Based VLIW processor under GALS Multi-processor technology with improved efficiency.
Arun Vijayaraghavan
M. Kannan
R. Seshasayanan
Published in:
CDES (2005)
Keyphrases
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low power
multi processor
high speed
gate array
low cost
power consumption
single chip
single processor
logic circuits
image sensor
real time
cmos technology
high end
wireless transmission
program execution
distributed memory
image processing