Design and Implementation of Scalable Low-Power Montgomery Multiplier.
Hee-Kwan SonSang-Geun OhPublished in: ICCD (2004)
Keyphrases
- low power
- vlsi architecture
- cmos technology
- single chip
- low cost
- power consumption
- low power consumption
- high speed
- logic circuits
- digital signal processing
- ultra low power
- gate array
- power dissipation
- fpga implementation
- design methodology
- nm technology
- vlsi circuits
- low end
- power reduction
- mixed signal
- vlsi implementation
- design process
- image compression
- signal processor
- circuit design
- smart card
- low complexity
- efficient implementation
- image sensor