Low-power multi-size HEVC DCT architecture proposal for QFHD video processing.
Luana Vieira Martinez BonattoFábio Luís Livi RamosBruno ZattMarcelo Schiavon PortoSergio BampiPublished in: SBCCI (2017)
Keyphrases
- low power
- video processing
- vlsi architecture
- video compression
- power consumption
- low cost
- high speed
- real time
- video analysis
- low bit rate
- video segmentation
- cmos technology
- signal processing
- mixed signal
- nm technology
- video surveillance
- low complexity
- low power consumption
- image compression
- discrete cosine transform
- computer vision
- image processing
- motion compensation
- block size
- image segmentation
- spatial domain
- motion estimation
- ultra low power
- motion compensated
- compression ratio
- activity recognition
- image data
- video sequences